AMD has officially confirmed that its Zen 6 “Olympic Ridge” CPUs and RDNA 5 GPUs are in active development. The company referenced both architectures at the OCP Global Summit 2025 and in its OpenSIL roadmap. Of course, we have early leaks of the Zen 7 “Grimlock” architecture, but it is scheduled to be released at some point in 2028.
While most technical details remain under NDA, several credible leaks provide us with a wealth of information about AMD’s next major evolution in CPU and GPU design.
Zen 6 will extend AMD’s chiplet leadership on TSMC’s 2 nm-class N2P process, while RDNA 5 aims to redefine real-time ray and path tracing performance through an overhauled graphics pipeline.
AMD Zen 6 architecture overview
As AMD transitions toward the 2 nm era, Zen 6 represents both refinement and revolution. Building on the proven Zen 5 foundation, Zen 6 introduces next-generation process nodes, higher clock speeds, and deeper efficiency improvements. This section outlines everything we know about AMD’s upcoming CPU design, based on confirmed details and credible industry reports.
Zen 6 core design and process summary
Before diving into the finer architectural upgrades, here’s a quick look at the key technical specifications that define Zen 6’s design direction:
| Spec / Feature | Expected Detail |
|---|---|
| Process Node | TSMC N2P for CCDs · N3P for I/O die |
| Launch Window | 1H 2027 (OpenSIL support target) |
| Core Configuration | 12 cores per chiplet (CCD) |
| Clock Targets | 6 – 6.5 GHz (N2P) · up to ≈7 GHz (N2X V-Cache) |
| Socket Support | AM5 backward compatibility |
| Memory Support | Faster DDR5 and LPDDR6 for APUs |
AMD reportedly evaluated the riskier N2X node but is prioritizing N2P for its first Zen 6 client chips to ensure manufacturing stability. Each CCD retains a 12-core layout, continuing AMD’s modular design philosophy that debuted with Zen 4 C.
Performance goals and architectural enhancements
Zen 6’s rumored clock speeds, reaching as high as 7.0 GHz on select SKUs, highlight AMD’s ambitions for single-threaded leadership.
These advances are expected to come from a combination of architectural and physical design changes, including:
- Deeper instruction window and smarter branch prediction.
- Expanded AVX-512 and AI acceleration paths.
- A unified memory controller for both desktop and APU designs.
Zen 6 APUs: Medusa Halo and Xbox Magnus
The next stage of AMD’s chiplet evolution isn’t just about CPUs. It is about fusion. AMD’s APU strategy under Zen 6 integrates powerful CPUs and RDNA 5 GPUs into shared chiplets, creating hybrid platforms capable of high-end gaming and compute workloads. Speaking of gaming, make sure to read our article about AI NPCs in video games!
Medusa Halo APU overview
Before exploring AMD’s console roadmap, here’s a look at the specifications for the upcoming Medusa Halo APU, the flagship consumer hybrid that bridges desktop and mobile power:
| Component | Specification |
|---|---|
| CPU | Zen 6 cores (up to 12 in cluster) |
| GPU | 48 RDNA 5 CUs (AT3 die) |
| Memory | LPDDR6 / DDR5 (integrated controller) |
| Target Segment | High-end laptops, small form-factor PCs |
| Performance Goal | Faster than PS5 Pro at lower power draw |
Targeted at premium mobile and compact PCs, Medusa Halo’s combination of Zen 6 performance cores and RDNA 5 graphics could deliver near-console-level performance in a portable footprint.
Xbox Magnus APU
As part of AMD’s custom-silicon roadmap, Zen 6 will also power Microsoft’s next-generation Xbox “Magnus” console SoC. Here’s how it’s shaping up based on credible reports and engineering samples:
| Component | Specification |
|---|---|
| CPU | 11-core hybrid: 3× Zen 6 + 8× Zen 6c |
| GPU | Custom RDNA 5, ~60 Compute Units |
| Target Performance | 4K/120Hz with path tracing |
| Launch Window | Late 2027 – early 2028 |
Both Medusa and Magnus reflect AMD’s long-term commitment to scalable chiplet reuse, building one architecture that adapts from console to cloud.
RDNA 5 architecture and GPU line-up
If Zen 6 is evolutionary, RDNA 5 is revolutionary. It is rumored to be AMD’s largest GPU redesign since the original RDNA, aimed at matching NVIDIA in ray tracing and pushing further into hybrid rendering.
| GPU Die | Compute Units (CUs) | Market Target | Rival Tier |
|---|---|---|---|
| AT0 | ≈ 154 CUs | Enthusiast flagship | RTX 6090 |
| AT2 | ≈ 64 CUs | Upper-midrange | RTX 4080 / 5080 |
| AT3 | ≈ 48 CUs | APU / Handheld ( Medusa Halo ) | PS5 Pro class |
Key Architectural Highlights
- Completely re-engineered ray tracing units, promising parity or better than NVIDIA’s Blackwell RT pipeline.
- Path tracing acceleration is natively integrated at the shader compiler level.
- Improved cache hierarchy and tile-based rasterization for energy efficiency.
Timeline and Deployment
RDNA 5 is expected to launch in discrete form first (AT0/AT2) around late 2027, with console and handheld variants following through 2028. The architecture will also power next-generation PlayStation 6, Xbox Magnus, and Steam Deck 2 platforms.
Competitive landscape
AMD’s Zen 6 and RDNA 5 generations will compete directly with Intel’s Arrow Lake and Panther Lake CPUs, and NVIDIA’s Blackwell GPUs. The table below outlines how AMD’s next-gen platforms are positioned against rivals across key performance and efficiency metrics. Although things might be more difficult now, after the announcement of Intel and Nvidia’s partnership.
| Segment | AMD Product | Competing Platform | Competitive Outlook |
|---|---|---|---|
| Desktop CPU (2027) | Zen 6 (Olympic Ridge) | Intel Arrow Lake / Panther Lake | Higher efficiency · More cores per watt |
| GPU (2027–28) | RDNA 5 (AT0/AT2) | NVIDIA Blackwell / Lovelace Next | Significant RT gains · Improved AI rendering |
| APU / Console | Medusa Halo / Magnus | Custom Intel Arc / NVIDIA SoCs | Chiplet integration advantage |
AMD’s focus on scalable chiplets and fabric efficiency may allow it to out-maneuver monolithic designs in cost and yield as nodes shrink below 2 nm.
Release timeline and roadmap
AMD’s roadmap places Zen 6 and RDNA 5 firmly in the 2027–2028 window, coinciding with TSMC’s ramp-up of its N2P process. The timeline below consolidates what’s publicly confirmed and what’s supported by reliable leaks.
| Year | Event / Milestone |
|---|---|
| 2025 Q4 | AMD confirms Zen 6 and Medusa at OCP Summit |
| 2026 H2 | Engineering samples of Zen 6 CCDs on N2P |
| 2027 H1 | OpenSIL launch with Zen 6 support |
| 2027 H2 → 2028 | RDNA 5 flagship GPUs and console SoCs roll out |
This schedule aligns with AMD’s typical two-year cadence and TSMC’s N2P volume production window.
Is Zen 6 and RDNA 5 worth the wait?
Zen 6 and RDNA 5 mark the beginning of AMD’s “2 nm era.”
The company’s continued commitment to chiplet scalability, energy efficiency, and open firmware standards (OpenSIL) suggests a future where AMD can deploy a single architecture across desktop, server, console, and mobile segments with minimal redundancy.
If early targets hold true, Zen 6 could be AMD’s most efficient CPU ever, and RDNA 5 its first GPU family to fully rival NVIDIA in real-time path tracing.
The Frequently Asked Questions:
AMD’s OpenSIL roadmap targets first-half 2027 support, so consumer Zen 6 CPUs are expected mid-to-late 2027.
Zen 6 chiplets are built on TSMC’s N2P node with the I/O die on N3P.
Leaks suggest RDNA 5 AT0 (≈154 CUs) will target RTX 6090 levels of performance with superior path tracing efficiency.
